A Survey on ESD protection design in different RF circuits
نویسندگان
چکیده
منابع مشابه
Impedance-Isolation Technique for ESD Protection Design in RF Integrated Circuits
SUMMARY An impedance-isolation technique is proposed for on-chip ESD protection design for radio-frequency (RF) integrated circuits (ICs), which has been successfully verified in a 0.25-μm CMOS process with thick top-layer metal. With the resonance of LC-tank at the operating frequency of the RF circuit, the impedance (especially, the parasitic ca-pacitance) of the ESD protection devices can be...
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ژورنال
عنوان ژورنال: CSVTU Research Journal on Engineering and Technology
سال: 2019
ISSN: 0974-8725
DOI: 10.30732/rjet.20190801005